Pipelined packet processing
2004-12-28 issued as US patent US6836808. (with R. Bunce, C. Georgiou)
Received high licensing value patent award
Packet preprocessing interface for multiprocessor network handler
2005-06-07 issued as US patent US6904040. (with C. Georgiou)
Received high licensing value patent award
Dynamic reallocation of data stored in buffers based on packet size
2006-02-21 issued as US patent US7003597. (with C. Georgiou)
Received high licensing value patent award
Method and apparatus for enabling access to global data by a plurality of codes in an integrated executable for a heterogeneous architecture
2007-04-03 issued as US patent US7200840. (with M. Gschwind, J. K. O'Brien, K. M O'Brien)
Method and apparatus for mapping debugging information when debugging integrated executables in a heterogeneous architecture
2007-05-01 issued as US patent US7213123. (with M. Gschwind, J. K. O'Brien, K. M O'Brien)
Method and apparatus for prioritized instruction issue queue in a processor
2006-04-18 issued as US patent US7032101. (with M. Gschwind)
Received high licensing value patent award
Method and apparatus for software-assisted thermal management for electronic systems
2005-09-20 issued as US patent US6948082. (with M. Gschwind)
Received high licensing value patent award
Method and apparatus for overlay management within an integrated executable for a heterogeneous architecture
2007-06-04 issued as US patent US7222332. (with M. Gschwind, J. K. O'Brien, K. M O'Brien)
Method and apparatus for setting breakpoints when debugging integrated executables in a heterogeneous architecture
2007-05-29 issued as US patent US7225431. (with M. Gschwind, J. K. O'Brien, K. M O'Brien)
Method and apparatus for creating and executing integrated executables in a heterogeneous architecture
2007-07-10 issued as US patent US7243333. (with M. Gschwind, J. K. O'Brien, K. M O'Brien)
Architectural support for thread level speculative execution
2008-03-25 issued as US patent US7350027. (with A. Gara)
Multiprocessor subsystem in SoC with bridge between processor clusters interconnection and SoC system bus
2008-04-01 issued as US patent US7353362. (with V. Gregurick, C. Georgiou)
Programmable network protocol handler architecture
2006-07-04 issued as US patent US7072970. (with C. Georgiou, M. Denneau, R. Bunce)
Received high licensing value patent award
Snoop filter for filtering snoop requests
2008-05-13 issued as US patent US7373462. (with M. Blumrich, D. Chen, A. Gara, M. Giampapa, P. Heidelberger, D. Hoenicke, M. Ohmacht, P. Vranas)
Snoop filtering system in a multiprocessor system
2008-05-27 issued as US patent US7380071. (with M. Blumrich, D. Chen, A. Gara, M. Giampapa, P. Heidelberger, D. Hoenicke, M. Ohmacht, P. Vranas)
Method and apparatus for filtering snoop requests using a scoreboard
2008-06-03 issued as US patent US7383397. (with M. Blumrich, A. Gara, T. Puzak)
Method and apparatus for filtering snoop requests in a point-to-point interconnect architecture
2008-06-10 issued as US patent US7386683. (with M. Blumrich, D. Chen, A. Gara, M. Giampapa, P. Heidelberger, D. Hoenicke, M. Ohmacht, P. Vranas)
Method and apparatus for filtering snoop requests using multiple snoop caches
2008-06-10 issued as US patent US7386685. (with M. Blumrich, A. Gara)
Method and apparatus for detecting a cache wrap condition
2008-06-10 issued US patent US7386684. (with M. Blumrich, A. Gara, M. Giampapa, M. Ohmacht)
Method and apparatus for filtering snoop requests using stream registers
2008-06-24 issued US patent US7392351. (with M. Blumrich, A. Gara)
Low complexity speculative multithreading system based on unmodified microprocessor core
2008-07-22 issued as US patent US7404041. (with A. Gara, M. Gschwind)
Network processor system on chip with bridge coupling protocol converting multiprocessor macro core local bus to peripheral interfaces coupled system bus
2008-08-12 issued as US patent US7412588. (with C. Georgiou, V. Gregurick, I. Nair)
Low latency counter event indication
2008-09-16 issued as US patent US7426253. (with A. Gara)
Method and apparatus for efficient performance monitoring of a large number of simultaneous events
2008-12-02 issued as US patent US7461383. (with A. Gara, M. Gschwind)
Method and system of efficient packet reordering
2009-01-13 issued as US patent US7477644. (with C. Georgiou)