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“The Physical Design of On-Chip Interconnections”, 2003, IEEE Trans. of Computer-Aided Design of Integrated Circuits and Systems, Vol. 22, No. 3, pp. 254-276 (with M. Wisniewski, R. Franch, D. Conrady, D. Maynard, G. Fiorenza, C. Noyan).
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“Using Statistical Process Control to Monitor Active Managers”, 2003, The J. of Portfolio Management, Vol. 30, No. 1, pp. 86-94 (with D. Stein and T. Philips).
“Application of three-parameter lognormal distribution in EM data analysis”, 2006, Microelectronics Reliability, Vol. 46, pp. 2049-2055 (with B. Li, C. Christiansen, J. Gill, R. Filippi, T. Sullivan).
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“Modeling of risk losses using size-biased data”, 2007, IBM J. Res. Development., Vol. 51, pp. 309-323
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“Modeling and forecasting of defect-limited yield in semiconductor manufacturing”, 2008, IEEE Transactions of Semiconductor Manufacturing, Vol. 21(4), pp. 614-624 (with M. Baron, A. Takken and M. Lanzerotti)