Dr. Zehra Sura is a Research Staff Member in the Advanced Compiler Technologies group of the VLSI Systems department at the IBM T.J. Watson Research Center. Her research interests include memory access optimizations, analysis and transformation of programs for parallel processing, and the use of runtime techniques to improve compiler optimizations.
Currently, she works on compiler optimizations to reduce the amount of execution time that an application spends waiting for memory accesses to complete. She also works on a single-source Cell compiler that enables OpenMP programs to automatically execute in parallel across the multiple heterogenous cores on a Cell chip. This compiler is able to generate codes whose performance is comparable to that of hand-optimized codes for some high performance numerical applications.
Previously, she worked on a software implementation of memory consistency, and demonstrated the feasibility of providing sequential consistency in a Java virtual machine with a performance hit of 10% on average for a system based on Intel Xeon processors, and 26% on average for a system based on IBM Power3 processors. This work used escape analysis, synchronization analysis and delay set analysis to analyze inter-thread dependences in a parallel program and to determine the ordering constraints imposed by the memory consistency model. The analysis algorithms were designed to be efficient, incremental, and suitable for implementation in a dynamic just-in-time compiler.
She earlier worked on a technique to improve Java performance in the domain of numerical computing. This approach determined a set of kernel templates that are often and widely used in this domain, and used a static compiler to expose and recognize sections of the source code that conform to any kernel template. The runtime optimizer in the Java virtual machine then considered these code sections as blocked entities with specific properties, and exploited these properties to optimize their execution.
She has also worked on a pointer analysis designed to be precise when handling array elements, and applied this analysis to automatically parallelizing numerical codes.
She received a Bachelor of Engineering degree in Computer Science from the Visvesvaraya Regional College of Engineering, Nagpur, India in 1998. She then studied in the Department of Computer Science at the University of Illinois, Urbana-Champaign, where she received her Master of Science degree in 2001 and her Ph.D. degree in 2004. She joined IBM Research in Yorktown Heights, New York in October 2004.