| Future Systems: Challenges and Opportunities |
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Workloads are changing. Massively multithreaded applications are becoming increasingly important. Examples include search, web serving, large scale data mining, cryptography and numerous scientific and engineering workloads from orbital mechanics to fracture mechanics. The increasing number of processors in systems are a good match to such workloads, but the most appropriate system structure varies. This talk will explore system structures and where accelerators such as Cell are a good fit, and where more traditional and general purpose SMP implementations are appropriate. Underlying all of these systems is base silicon technology, and this talk will also discuss the increasing impact of power on system design, as well as some exciting new technologies that may significantly improve system performance.
| Synthesis of Parallel Programs |
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Parallel computers have been touted as the "next big thing" for three decades, but the software developers have been able to ignore it, largely by leveraging the ever increasing single-thread performance of modern microprocessors. This situation has completely changed within the last three years: flagship microprocessors from Intel, AMD and IBM are all "multicores". Now everyone needs a strategy for parallel programming.
One source of weaknesses in parallel programming has been the lack of compositionality; independently written parallel libraries and packages don’t compose very well. We will argue that perhaps traditional procedural abstraction and abstract data types don’t capture the essential differences between parallel and sequential programming. We will present a different notion of modules, based on guarded atomic actions, and view it as a resource to be shared concurrently by other modules. As opposed to implicitly or explicitly specifying parallelism in a program, we think of parallel programming as a process of synthesis from a set of modules with proper interfaces and composition rules. We will draw connections between this hardware-design inspired methodology and traditional approaches to multithreaded parallelism including programming based on transactions.
| How Micro-architects can Help Solve the Problem of Parameter Variation in Upcoming Processor Chips |
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Parameter variation in upcoming processor chips will both hurt processor frequency and inflate static power. It is unlikely, however, that we will be willing to design the chips for worst-case parameters --- performance would be just too low. Instead, we need solutions at multiple levels to tolerate (and mitigate) such variation.
In this talk, I will discuss some insights into how to address the problem of variation from a micro-architecture level. I will argue that we may need to learn to live with faults caused by variation, and suggest microarchitectural approaches to handle and possibly even leverage such faults.
| Exploiting Parallelism Adaptively with Composable Cores |
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Future microprocessor performance improvements will come principally from increased exploitation of parallelism at multiple granularities, not from faster devices or deeper pipelines. However, each design and application each have their own sweet spot with respect to the best level at which parallelism should be found and mined: by the microarchitecture, compiler, programmer, or some combination of the three. In this talk, I will describe the Tflex architecture, based on the TRIPS ISA, which permits an array of power-efficient, lightweight cores to be configured on-the-fly to exploit many granularities of parallelism without requiring changes to application binaries. This architecture completes the trend toward distributed microarchitectures by distributing every major structure across a micronetwork. With this support, an array of 32 single-issue Tflex cores can be configured to run 32 threads, acting as a fine-grain CMP, or configured to be a single, 32-wide issue processor, or any point in between.
| Next Generation Computing Systems: Multi-core, Flexible and Modular for the Application Optimized Integrated Solutions |
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In this presentation I will discuss the fundamental changes in technology and market directions which are driving an important shift from serial, single threaded focused computing to parallelised computing, using multi-core and special function engines (accelerators). I will describe key aspects of the technology elements that are needed to enable this new direction in computing.
| Top Five Reasons Why Sequential Programming Models Could Be the Best |
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The computer industry is at the stage of divergence in processor design. In the next few years, we will see heterogeneous multi-cores, homogeneous multi-cores, SPE-style accelerators, GPGPU style accelerators, ASIC-style accelerators, and FPGA-style accelerators. All these platforms will impose different machine-level programming models and constraints. It will be extremely tempting for vendors to provide explicit parallel programming tools for these platforms. The higher the level of hardware parallelism, the stronger the temptation will be. In this talk, I will take a potentially unpopular position and argue that such approach will likely be counter productive in the long run. I will advocate a paradigm where programmers focus on algorithm-level parallelism and expressing the high-level assumptions/properties to the underlying programming tool chain. The compiler and related tools should be equipped with much more advanced bottom-up analysis capabilities and programmer assertions than what they have today in order to have a deep, comprehensive understanding of the real execution constraints of the input program. Such understanding is then used to drive automatic or interactive parallel code generation tools for the diverse set of machine-level programming models required by hardware platforms. I will present early indications that such model for parallel software development, which is being developed at the MARCO GSRC Concurrent Systems Theme, is both achievable and desirable.
| Transforming the Computing Infrastructure with Virtualization Technology |
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Virtualization, first introduced on IBM mainframes in the late 1960's, has experienced a renaissance as new hardware and software support has made it available on industry-standard machines and operating systems. This talk will explore how virtualization is transforming the computing infrastructure as well as its impact on hardware and software design and deployment.