2008 High-throughput Nanophotonic Switch

In a paper published in the April 2008 issue of the journal Nature Photonics, IBM unveils the development of a silicon broadband optical switch, another key component required to enable on-chip optical interconnects. Once the electrical signals have been converted into pulses of light, this switching device performs the key role of “directing traffic” within the network, ensuring that optical messages from one processor core can efficiently get to any of the other cores on the chip. The device is microscopically small with a footprint about 100X smaller than the cross section of a human hair. As many as 2000 would fit side-by-side in an area of one square millimeter making it possible to integrate thousands of them on a single chip, as would be required for future multi-core processors. The switch is an important building block to control the flow of information inside future chips and can significantly speed up the chip performance while using much less energy.

The report on this work, entitled "High-throughput silicon nanophotonic wavelength-insensitive switch for on-chip optical networks" by Yurii Vlasov, William M. J. Green, and Fengnian Xia of IBM T.J. Watson Research Center in Yorktown Heights, N.Y. is published in the April 2008 issue of the journal Nature Photonics. This work was partially supported by the Defense Advanced Research Projects Agency (DARPA) through the Defense Sciences Office program "Slowing, Storing and Processing Light".

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Optical network on a multicore chip

Figures captions Image 1 The silicon broadband optical switch, represented by the black boxes in the figure, performs the key role of “directing traffic” within the on-chip optical network. Once the electrical signals from each processor core have been converted into pulses of light, the switch devices are set into the necessary positions, as shown by the arrows, for routing the optical messages from the transmitting core to the receiving core.

Illustration of traffic routing between cores A to G, and A to C.

Figures captions Image 2 The switches are set in order to direct an optical signal sent from Core A to Core G, as illustrated by the blue path, and from Core E to Core C, as shown by the red path.

Illustration of traffic routing between cores

Figures captions Image 3 Once the first set of signals have been sent, the network of switches is reset to route messages from Core A to Core H (blue path), Core E to Core D (red path), and Core F to Core G (green path).

Nanophotonic switches forming an on-chip optical network

Figures captions Image 4 Multiple nanophotonic switches based on silicon coupled microring resonators as the one described in the paper. Individual devices are connected to form a switching fabric for on-chip interconnects. Image is taken with optical microscope.