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IBM Journal of Research and Development  
Volume 24, Number 3, Page 339 (1980)
Semiconductor Memory Technology
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A One-Device Memory Cell Using a Single Layer of Polysilicon and a Self-Registering Metal-to-Polysilicon Contact

by V. L. Rideout, J. J. Walker, A. Cramer
The fabrication and operation of a novel one-device dynamic memory cell are described. Like the conventional double overlapping polysilicon cell, the new memory cell has a diffused bit line and a metal word line, uses five basic masking operations, and provides essentially equivalent cell area for the same lithographic feature size. Unlike the double polysilicon cell, however, the new cell uses a single layer of polysilicon to provide a more planar surface topography, and a self-registering metal-to-polysilicon contact to provide a small cell area. An essential aspect of the fabrication method of the self-registered contact cell is the use of two lithographic masking operations that define two patterns in a single polysilicon layer, the MOSFET gate electrode and the MOS capacitor electrode. The self-registering contact also facilitates a powerful polysilicon wiring technique that is applicable to the access circuits located peripherally to the array of memory cells.
Related Subjects: LSI; Memory (computer) design and technology; Semiconductor technology