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1988	A multi-purpose VLSI chip for adaptive data compression of bilevel images
1985	Architecture of a digital signal processor
1985	Microprocessors in brief
1985	Signal processor chip implementation
1985	The effects of wafer to wafer defect density variations on integrated circuit defect and fault distributions
1984	ACORN: A system for CVS macro design by tree placement and tree customization
1984	An interactive system for VLSI chip physical design
1984	An iterative-improvement penalty-function-driven wire routing system
1984	Custom Chip/Card Design System
1984	Design considerations of a static LSSD polarity hold latch pair
1984	KWIRE: A multiple-technology, user-reconfigurable wiring tool for VLSI
1984	Modeling of defects in integrated circuit photolithographic patterns
1984	Resist profile control in E-beam lithography
1984	Using a hardware simulation engine for custom MOS structured designs
1984	Yield model for fault clusters within integrated circuits
1983	A ''Zero-Time'' VLSI Sorter
1983	Modeling of Integrated Circuit Defect Sensitivities
1983	OYSTER: A Study of Integrated Circuits as Three-Dimensional Structures
1982	A Conduction-Cooled Module for High-Performance LSI Devices
1982	A New Set of Printed-Circuit Technologies for the IBM 3081 Processor Unit
1982	A VLSI Bipolar Metallization Design with Three-Level Wiring and Area Array Solder Connections
1982	Conduction Cooling for an LSI Package: A One-Dimensional Approach
1982	Cost/Performance Single-Chip Module
1982	Electrical Design of a High Speed Computer Package
1982	Evolution and Accomplishments of VLSI Yield Management at IBM
1982	Influence on LSI Package Wireability of Via Availability and Wiring Track Accessibility
1982	Quality and Reliability Assurance Systems in IBM Semiconductor Manufacturing
1982	Semiconductor Manufacturing Technology at IBM
1982	System Development and Technology Aspects of the IBM 3081 Processor Complex
1982	The Thin-Film Module as a High-Performance Semiconductor Package
1982	Thermal Conduction Module: A High-Performance Multilayer Ceramic Package
1981	A 1024-Byte ECL Random Access Memory Using a Complementary Transistor Switch (CTS) Cell
1981	A High-Density Bipolar Logic Masterslice for Small Systems
1981	Bipolar Circuit Design for a 5000-Circuit VLSI Gate Array
1981	Delay Regulation—A Circuit Solution to the Power/Performance Tradeof
1981	Techniques for Improving Engineering Productivity of VLSI Designs
1981	Wire Length Distribution for Placements of Computer Logic
1980	1/N Circuit and Device Technology
1980	A Charge Injection Transistor Memory Cell
1980	A One-Device Memory Cell Using a Single Layer of Polysilicon and a Self-Registering Metal-to-Polysilicon Contact
1980	A Silicon and Aluminum Dynamic Memory Technology
1980	Circuit Implementation of Fusible Redundant Addresses on RAMs for Productivity Enhancement
1980	Implanted Source/Drain Junctions for Polysilicon Gate Technologies
1980	Proximity Correction Enhancements for 1-μm Dense Circuits
1980	Reduction of Leakage by Implantation Gettering in VLSI Circuits
1980	Reliability of SiO2 Gate Dielectric with Semi-Recessed Oxide Isolation
1980	Stand-Alone Wiring Program for Josephson Logic
1980	VLSI Device Phenomena in Dynamic Memory and Their Application to Technology Development and Device Design
1980	Yield Model for Productivity Optimization of VLSI Memory Chips with Redundancy and Partially Good Product
1979	Micromechanical Membrane Switches on Silicon