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Related Papers
1996
BooleDozer: Logic synthesis for ASICs
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Design planning for high-performance ASICs
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PowerPC AS A10 64-bit RISC microprocessor
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Animation and 3D color display of multiple-variable data: Application to semiconductor design
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FEDSSA 2D semiconductor fabrication process simulator
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The generation of three-dimensional bipolar transistor models for circuit analysis
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Two-dimensional device simulation program: 2DP
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VLSI wiring capacitance
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OYSTER: A Study of Integrated Circuits as Three-Dimensional Structures
1982
A Bipolar VLSI Custom Macro Physical Design Verification Strategy
1982
A VLSI Design Verification Strategy
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Bipolar Chip Design for a VLSI Microprocessor
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Boolean Comparison of Hardware and Flowcharts
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Influence on LSI Package Wireability of Via Availability and Wiring Track Accessibility
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Timing Analysis of Computer Hardware
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Bipolar Circuit Design for a 5000-Circuit VLSI Gate Array
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Design Automation in IBM
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Logic Synthesis Through Local Transformations
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Number of Vias: A Control Parameter for Global Wiring of High-Density Chips
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Wire Length Distribution for Placements of Computer Logic
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A Heuristic Test-Pattern Generator for Programmable Logic Arrays
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Design Automation and the Programmable Logic Array Macro
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Macro Generation Algorithms for LSI Custom Chip Design
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Solid Logic Design Automation
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