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IBM Journal of Research and Development  
Volume 24, Number 3, Page 378 (1980)
Semiconductor Memory Technology
  Full article: arrowPDF   arrowCopyright info


1/N Circuit and Device Technology

by A. Bhattacharyya, D. P. Gaffney, R. A. Kenyon, P. B. Mollier, J. E. Selleck, F. W. Wiedman
The 1/N memory cell is the bipolar analog of the FET one-device cell. A thin dielectric and doped polysilicon are combined with bipolar technology to achieve a vertically integrated, high-density, fast-performance memory chip. The circuit design, device structure, and processing implementation for a 64K-bit dynamic, 1/N fractional-device, experimental bipolar memory are presented. Test results for several geometrical and structural variations, including 16K-bit storage arrays, are given.
Related Subjects: LSI; Memory (computer) design and technology; Semiconductor technology