Optimization of interconnections between packaging levels
by J. H. Kelly, C. K. Lim, W. T. Chen
In large-scale integrated circuits, the interface between ceramic modules and the next levelepoxy-glass circuit boards or cardscontains a large number of pin arrays. Because the modules and the card are usually quite rigid and mechanically strong, the interface between the module and the card is commonly the weakest region in the assembly system. This interface is where the differential deformations between the two levels of packaging are accommodated. This paper describes a theoretical and experimental program to understand the loadings and stresses present, and to optimize the design of the connecting pin in order to distribute the stresses more evenly across the surfaces of the braze joint that connects the pin to the ceramic module. This work was done jointly by members of the East Fishkill and Endicott laboratories.